Field of the Invention
The invention relates to a method for producing an electrical connection between integrated circuits with protection against electrostatic discharges. The invention also relates to an arrangement of two electrically conductively connected integrated circuits with protection against electrostatic discharges.
In electronic systems, there is a need for providing two or more integrated circuits in one package with a signal connection, to enable a compact arrangement of the circuits. The circuits have contact areas, so-called pads, which are connected via bonding wires to connection pins of the package, known as pins. By way of them, the supply voltage and signals can be supplied. Inside the package, signal transmission among the circuits again takes place via respective connection pads which in turn are joined to one another via bonding wires. In general, these internal signal terminals and connections are not extended outside the package.
To prevent electrostatic discharges that come into contact with the external package pins from destroying the circuits and function units inside the circuit, the pads extended to the outside are assigned protective structures guarding against electrostatic discharge (ESD). These protective structures act as switches, which become conducting when there is overvoltage and dissipate the applied electrostatic discharge to a line for one of the supply voltages. The ESD protection structures occupy a not inconsiderable amount of circuit surface area.
In conventional technology, protection structures are needed for the terminal pads provided for internal signal connections in the package as well, so as to dissipate electrostatic discharges that can occur during assembly, for instance during bonding. These ESD protection structures increase the chip surface area as well.
U.S. Pat. No. 5,587,599 describes a method for producing a semiconductor component with protection against electrostatic discharge. During the production of the wafer, the terminals of the circuit are connected to ground. At the end of wafer production and before the semiconductor chips are tested, the ground connections of the terminals are severed.
In East German Patent Disclosure DD 236 623 B5, a method for hybrid assembly of electronic components is described in which two external terminals of a hybrid circuit are short-circuited to one another via a severable connection. Internally, electrodes of a MOSFET are coupled with these terminals.
It is accordingly an object of the invention to provide a method for assembling integrated circuits with protection of the circuits against electrostatic discharge, and an arrangement of integrated circuits with protection against electrostatic discharge, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which obtains electrical connection among integrated circuits that requires less surface area than prior art methods and circuits and still provides adequate protection against electrostatic discharge.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for producing an electrical connection between integrated circuits, which comprises: providing a first integrated circuit having a terminal, a signal terminal; forming an electrically conductive connection between the terminal and the signal terminal of the first integrated circuit; providing a second integrated circuit having a terminal that is coupled to a protective structure for protecting against electrostatic discharges; disposing the first and second integrated circuits adjacent one another; electrically connecting the signal terminal of the first integrated circuit to the terminal of the second integrated circuit; and severing the electrically conductive connection between the terminal and the signal terminal of the first integrated circuit using an energy pulse.
In accordance with an added feature of the invention, there is provided a method wherein the severing step is performed by applying an electrical current pulse to the terminal of the second integrated circuit.
In accordance with an additional feature of the invention, there is provided a method wherein the forming step includes: forming the electrically conductive connection between the terminal and the signal terminal of the first integrated circuit with a portion of reduced cross sectional area as compared to the rest of the connection; and dimensioning the portion to dissipate electrostatic discharges between the terminal and the signal terminal of the first integrated circuit and to be severed during application of the energy pulse in the severing step.
In accordance with another feature of the invention, there is provided a method wherein the energy pulse used in the severing step is an electrical current pulse applied to the terminal of the second integrated circuit.
In accordance with a further added feature of the invention, there is provided a method including: disposing the first and second integrated circuits in a package having terminal pins so that the signal terminal of the first integrated circuit is not accessible from outside of the package; and connecting the terminal of the first integrated circuit and the terminal of the second integrated circuit to a respective terminal pin of the package.
In accordance with a further additional feature of the invention, there is provided a method wherein the severing step is performed after the step of connecting the respective terminals to the respective terminal pins.
In accordance with still a further feature of the invention, there is provided a method wherein the disposing step is performed so that terminal of the second integrated circuit is not covered by the first integrated circuit.
In accordance with yet another feature of the invention, there is provided a method for producing an electrical connection between integrated circuits, which comprises: providing a first integrated circuit having a surface; disposing first and second terminal pads on the surface of the first integrated circuit; forming an electrically conductive connection between the first and second terminal pads of the first integrated circuit; providing a second integrated circuit having a surface; disposing first and second terminal pads on the surface of the second integrated circuit; electrically coupling at least the first terminal pad of the second integrated circuit to a protective structure for protecting against electrostatic discharges; disposing the surfaces of the first and second integrated circuits longitudinally adjacent one another so that the first and second terminal pads of the second integrated circuit are not covered by the first integrated circuit; electrically joining at least one of the first and second terminal pads of the first integrated circuit to one of the first and second terminal pads of the second integrated circuit; forming an electrically conductive connection between the first and second terminal pads of the first integrated circuit; and severing the electrically conductive connection using an energy pulse.
In accordance with yet another added feature of the invention, there is provided a method wherein the electrically joining step is performed using an electrically conductive solderable material.
In accordance with yet another additional feature of the invention, there is provided a method wherein the electrically joining step is performed using a conductive adhesive material.
In accordance with yet a further feature of the invention, there is provided a method including electrically joining the other one of the first and second terminal pads of the first integrated circuit to the other one of the first and second terminal pads of the second integrated circuit.
In accordance with again an added feature of the invention, there is provided an arrangement of electrically connected integrated circuits, comprising: a first integrated circuit including a terminal, a signal terminal, and an connection electrically connecting the terminal and the signal terminal, the connection including a main portion having a cross sectional area, and the connection including a constricted portion having a reduced cross sectional area with respect to the cross sectional area of the main portion; and a second integrated circuit including a terminal having a protective structure for protecting against electrostatic discharge, and a connection electrically connecting the terminal of the second integrated circuit to the signal terminal of the first integrated circuit.
In accordance with again an additional feature of the invention, there is provided an arrangement wherein the constricted portion is dimensioned to conduct electrostatic charges and dimensioned for severance when subjected to an energy pulse.
In accordance with again another feature of the invention, there is provided an arrangement wherein: the first integrated circuit includes at least one further signal terminal; and the connection electrically connecting the terminal of the second integrated circuit to the signal terminal of the first integrated circuit includes a diode, and the connection electrically connecting the terminal of the second integrated circuit to the signal terminal of the first integrated circuit includes a further diode electrically connecting the at least one further signal terminal to the terminal of the second integrated circuit.
Preferably, the connection between the signal terminal and the supply potential terminal in one of the circuits is a metal or polysilicon conductor track. It therefore assures a low-impedance connection between these terminals. During assembly, any electrostatic discharges that occur can be dissipated thereby. After assembly, when the signal terminal is no longer accessible from outside, the connection is unnecessary; it is severed and has no further influence on signal processing. The metal conductor track is preferably formed in the uppermost metal layer, which is optionally applied in addition to the other metal layers that connect the parts of the integrated circuit that perform signal processing. A major advantage is that no additional surface area is needed.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a method for assembling integrated circuits with protection of the circuits against electrostatic discharge, and an arrangement of integrated circuits with protection against electrostatic discharge, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.